1. Technical Field
The present disclosure is related to a memory device, and in particular to, a method for programming selected memory cells in a nonvolatile memory device and the nonvolatile memory device thereof.
2. Description of Related Art
Currently, the memory device technology develops fast, and the memory devices with large capacities are usually used in our daily life. The nonvolatile memory device has a plurality of memory cells which have floating gate transistors to be cleared in a transient state. In the transient state, each of the floating gate transistors may have a threshold voltage of about 3V. To program a selected memory cell, a program voltage, for example 9V, should be applied to a word line of the selected memory cell for a predetermined time period, wherein the predetermined time period is also called a program time or a programming interval. The threshold voltage of the floating gate transistor of the selected memory cell may be thus raised to a higher voltage, but the threshold voltages of the floating gate transistors of the non-selected memory cells are not raised.
However, some problems may arise when at least one memory cell is selected for programming among the memory cells of a selected word line. For example, when a program voltage is applied to a selected word line, the program voltage may be applied not only to the selected memory cells, but also to the non-selected memory cells of the selected word line. As a result, the non-selected memory cells of the selected word line may also be programmed when the selected memory cells of the selected word line are programmed. This problem is referred to as a “program disturb” fault, which is an unintended programming of the non-selected memory cell of the selected word line.
To avoid the above mentioned problems, a ramping word line programming scheme is thus provided. To achieve the ramping word line programming scheme, a charge pump is thus needed. The ramping word line programming scheme ramps the provided voltage step by step. Along with the advancement of the semiconductor process, the smaller the transistor size is, the larger the resistance of the bit line is. Thus, when the word line is selected to program at least one the selected memory cell of the word line, and the selected memory cell is located at a tail end of the bit line, the programming ability is reduced since the resistance of the bit line decreases the voltage applied to the memory cell from the bit line. Even, the charge pump may increase the supplied programming voltage, and/or the voltage applied on the bit line can be increased, so as to solve the above problem. However, the “program disturb” fault cannot still avoided, and the chip area is increased, while the charge pump must provide the higher programming voltage. Furthermore, the more the ramping times of the programming voltage are, the longer the programming interval is.